Cannon Lake (microprocessor)
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Cannon Lake (formerly Skymont) is Intel's codename for the 10 nm die shrink of the Kaby Lake microarchitecture. As a die shrink, Cannon Lake is a new process in Intel's process-architecture-optimization execution plan as the next step in semiconductor fabrication.[2] Cannon Lake CPUs are the first mainstream CPUs to include the AVX-512 instruction set.
This article is about the Intel microprocessor. For other uses, see Cannon Lake (disambiguation).
Quick Facts General information, Launched ...
General information | |
---|---|
Launched | May 15, 2018; 5 years ago (May 15, 2018) |
Discontinued | February 28, 2020; 4 years ago (February 28, 2020) |
Marketed by | Intel |
Designed by | Intel |
Common manufacturer(s) |
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Performance | |
Max. CPU clock rate | 3.2 GHz |
Cache | |
L1 cache | 64 KB per core |
L2 cache | 256 KB per core |
L3 cache | 2 MB per core |
Architecture and classification | |
Technology node | Intel 10 nm (tri-gate) transistors |
Microarchitecture | Palm Cove |
Instruction set | x86-64 |
Instructions | x86-64, Intel 64 |
Extensions | |
Physical specifications | |
Cores |
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GPU(s) | Factory disabled |
Socket(s) |
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Products, models, variants | |
Product code name(s) |
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Brand name(s) | |
History | |
Predecessor(s) | Desktop: Coffee Lake (2nd optimization) Kaby Lake Refresh (2nd optimization) |
Successor(s) | Ice Lake (architecture) |
Support status | |
Legacy support for iGPU |
Close
Prior to Cannon Lake's launch, Intel launched another 14 nm process refinement with the codename Coffee Lake.[3]
The successor of Cannon Lake is Ice Lake, powered by the Sunny Cove microarchitecture, which represents the architecture phase in the process-architecture-optimization model.[4][5]