Serial computer

A serial computer is a computer typified by bit-serial architecture – i.e., internally operating on one bit or digit for each clock cycle. Machines with serial main storage devices such as acoustic or magnetostrictive delay lines and rotating magnetic devices were usually serial computers.

Serial computers require much less hardware than their bit-parallel counterparts^[1] which exploit bit-level parallelism to do more computation per clock cycle. There are modern variants of the serial computer available as a soft microprocessor^[2] which can serve niche purposes where the size of the CPU is the main constraint.

The first computer that was not serial and used a parallel bus was the Whirlwind in 1951.

A serial computer is not necessarily the same as a computer with a 1-bit architecture, which is a subset of the serial computer class. 1-bit computer instructions operate on data consisting of single bits, whereas a serial computer can operate on N-bit data widths, but does so a single bit at a time.

Serial machines

• EDVAC (1949)
• BINAC (1949)
• SEAC (1950)
• UNIVAC I (1951)
• Elliott Brothers Elliott 152^{[citation needed]} (1954)
• Bendix G-15 (1956)
• LGP-30 (1956)^[3]
• Elliott Brothers Elliott 803 (1958)
• ZEBRA^{[citation needed]} (1958)
• D-17B guidance computer (1962)
• PDP-8/S^[4] (1966)
• General Electric GE-PAC 4040 process control computer
• F14 CADC (1970)  – transferred all data serially, but internally operated on many bits in parallel^[5]
• Kenbak-1 (1971)
• Datapoint 2200 (1971)^[6]
• HP-35 (1972)^[7]
• Digit-serial HP Saturn-based calculators^[8] from the HP-71B (1974) to the HP 50g (2006–2015)
• National Semiconductor SC/MP (1976)
• Ferranti F100-L (1977)  – 16-bit, but uses a bit-serial arithmetic logic unit

Massively parallel

Most of the early massive parallel processing machines were built out of individual serial processors, including:

• ICL Distributed Array Processor (1979)
• Goodyear MPP (1983)
• Connection Machine CM-1 (1985)
• Connection Machine CM-2 (1987)
• MasPar MP-1 (1990)  – 32-bit architecture, internally processed 4 bits at a time^[9]
• VIRAM1 computational RAM (2003)

See also

• 1-bit computing
• BKM algorithm
• CORDIC algorithm