B5000 instruction set

Not to be confused with Burroughs B6x00-7x00 instruction set.

See also: Burroughs large systems § B5000

The Burroughs B5000 was an early stack machine (a type of computer that uses stacks instead of general-purpose registers) and one of the first computers to implement segmented virtual memory (dividing memory into logic segments, such code and data, that allow for better isolation and more flexible allocation). Introduced in the early 1960s, it was designed to support high-level programming languages through architectural features uncommon at the time.

The B5000 instruction set applied to the B5000, B5500, and B5700 models. It was not compatible with the later B6500, B7500, or B8500 series, which introduced a different architecture.

Technical characteristics

Instruction streams on a B5000 contain 12-bit syllables, four to a word. The architecture has two modes, Word Mode^[1][2] and Character Mode,^[3][4] and each has a separate repertoire of syllables. A processor may be either Control State or Normal State, and certain syllables are only permissible in Control State. The architecture does not provide for addressing registers or storage directly; all references are through the 1024 word Program Reference Table (PRT), current code segment, marked locations within the stack or to the A and B registers holding the top two locations on the stack. Burroughs numbers bits in a syllable from 0 (high bit) to 11 (low bit) and in a word from 0 (high bit) to 47 (low bit).

Word Mode

In Word Mode, there are four types of syllables.

B5x00 Word Mode Syllables^[5]

Bits 10-11	Syllable Type	Bits 0-9[6]
0	Literal Call	integer value
1	Opcode	Operation
2	Operand Call	Relative address
3	Descriptor Call	Relative address

The interpretation of the 10-bit relative address in Operand Call and Descriptor Call depends on the setting of several processor flags. For main programs (SALF off) it is always an offset into the Program Reference Table (PRT).

B5x00 Relative Addressing^[7]

SALF[a]	T0 A38	T1 A39	T2 A40	MSFF[b]	Base	Contents	Index Sign	Index Bits[c]	Max Index
OFF	-	-	-	-	R	Address of PRT	+	T 0-9 A 38-47	1023
ON	OFF	-	-	-	R	Address of PRT	+	T 1-9 A 39-47	511
ON	ON	OFF	-	OFF	F	Address of last RCW[d] or MSCW[e] on stack	+	T 2-9 A 40-47	255
ON	ON	OFF	-	ON	(R+7)[f] Bits 18-32	F register from MSCW[e] at PRT+7	+	T 2-9 A 40-47	255
ON	ON	ON	OFF	-	C[g]	Address of current instruction word	+	T 3-9 A 41-47	127
ON	ON	ON	ON	OFF	F	Address of last RCW[d] or MSCW[e] on stack	-	T 3-9 A 41-47	127
ON	ON	ON	ON	ON	(R+7)[f] Bits 18-32	F register from MSCW[e] at PRT+7	-	T 3-9 A 41-47	127
Notes: SALF Subroutine Level Flipflop MSFF Mark Stack FlipFlop For Operand Call (OPDC) and Descriptor Call (DESC) syllables, the relative address is bits 0-9 (T register) of the syllable. For Store operators (CID, CND, ISD, ISN, STD, STN), the A register (top of stack) contains an absolute address if the Flag bit is set and a relative address if the Flag bit is off. RCW  Return Control Word MSCW Mark Stack Control Word F register from MSCW at PRT+7 C (current instruction word)-relative forced to R (PRT)-relative for Store, Program and I/O Release operators

Character Mode