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Chenming Hu
Chinese-American electronic engineer From Wikipedia, the free encyclopedia
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Chenming Hu (Chinese: 胡正明; pinyin: Hú Zhèngmíng; born 12 July 1947[1]), also known by his English name Calvin Hu, is a Taiwanese-American electronic engineer who specializes in microelectronics. He is TSMC Distinguished Professor Emeritus in the electronic engineering and computer science department of the University of California, Berkeley. In 2014, the National Medal of Technology and Innovation cited "For pioneering innovations in microelectronics including reliability technologies, the first industry-standard model for circuit design, and the first 3-dimensional transistors, which radically advanced semiconductor technology.[2]
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Early life and education
Hu was born in Beijing on July 12, 1947.[1] When he was an infant, his family fled to Taiwan during the Great Retreat. He graduated from National Taiwan University in 1968 with a Bachelor of Science (B.S.) in electrical engineering, then completed graduate studies in the United States, where he earned a Master of Science (M.S.) in 1970 and his Ph.D. in 1973 from the University of California, Berkeley, under professor John Roy Whinnery.[3] His doctoral dissertation was titled, "Nematic Liquid Crystal Optical Waveguides".[4]
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Career
Summarize
Perspective
Hu began his academic career as an Assistant Professor at the Massachusetts Institute of Technology (MIT) from 1973 to 1976. In 1976, he joined the University of California, Berkeley as a professor of Electrical Engineering and Computer Sciences, where he remained for decades.[1] He served as the Chancellor’s Chair Professor (1998–2001) and TSMC Distinguished Chair Professor (2001–2013) and currently holds the title of Professor Emeritus and Professor of the Graduate School.[5]
Hu is known for his role in transistor modeling.[6] Since 1995, he has led the ongoing development of BSIM (Berkeley Short-channel IGFET Model), the industry-standard transistor modeling tool for integrated circuit (IC) design, which is provided royalty-free and underpins the design of trillions of dollars’ worth of IC products.[7]
Hu has supported education and community service initiatives. He served as Chairman of the East Bay Chinese School (1988–1990) and Chairman of Friends of Children with Special Needs (2015–2017).[6] The Chenming Hu Innovation Lab at UC Berkeley and the Chenming and Margaret Hu Medical Center at Asian Health Services are named in his honor.[8]
From 2001 to 2004, Hu served as Chief Technology Officer (CTO) of Taiwan Semiconductor Manufacturing Company (TSMC), the world’s leading semiconductor foundry.[9] During his tenure, TSMC advanced key technologies that positioned it as a global leader in advanced chip manufacturing.[10] He has also served on the boards of technology companies including SanDisk, Inphi, Ambarella, and ACM Research.
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Research
Hu is credited with leading the invention and development of the FinFET (Fin Field-Effect Transistor) in 1999, a 3D thin-body transistor architecture that overcame scaling limitations of traditional planar transistors.[1] Intel hailed FinFET as “the most radical shift in semiconductor technology in over 50 years.” The technology is now used in virtually all modern microprocessors, smartphones, and AI chips.[11]
In 1995, amid predictions of Moore’s Law's imminent end, Hu conceived the FinFET, a three-dimensional transistor structure with a thin raised channel wrapped by the gate on three sides.[12] Developed under a DARPA-funded project, the FinFET allowed for reduced leakage current and continued transistor scaling below 25 nanometers. Intel introduced FinFETs into commercial production in 2011, and the technology remains foundational to modern CPUs, GPUs, AI processors, and mobile devices.[13]
In addition to FinFET, Hu made contributions to IC device scaling, reliability modeling, and low-power transistor design. His research has shaped the semiconductor industry for more than four decades.[14]
Personal life
Hu lives in California with his family and has two sons, Raymond and Jason.[11]
Awards and honors
- 1997: elected to the United States National Academy of Engineering[15]
- 1997: IEEE Jack Morton Award, "for outstanding contributions to semiconductor devices and technology"[16]
- 2002: IEEE Solid-State Circuits Award (for developing the first international standard transistor model BSIM)[17]
- 2002: IEEE Paul Rappaport Award[18]
- 2009: IEEE Jun-ichi Nishizawa Medal, "for technical contributions to MOS device reliability, scaling of CMOS and compact device modeling"[19][3][20]
- 2011: Asian American Engineer of the year award,[21]
- 2011: National Taiwan University Distinguished Alumni Award,[22]
- 2011: Semiconductor Industry Association Award,[23]
- 2013: Phil Kaufman Award for Distinguished Contributions to EDA,[24]
- 2014: National Medal of Technology and Innovation,[25] given at the White House by Barack Obama in 2016.[26]
- 2015: SEMI Award for North America, for the BSIM transistor family.[27]
- 2016: Pan Wen Yuan Award, by the Industrial Technology Research Institute.[28]
- 2020: IEEE Medal of Honor Award.[29]
- 2023: Taiwan Presidential Science Prize[30]
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Selected publications
Books
- Hu, Chenming; White, Richard M. (1983). Solar cells: from basics to advanced systems. McGraw-Hill series in electrical engineering. New York: McGraw-Hill. ISBN 978-0-07-030745-2.
- Cheng, Yuhua; Hu, Chenming (2002). Mosfet Modeling & BSIM3 User's Guide. Boston, MA: Kluwer Academic Publishers. doi:10.1007/b117400. ISBN 978-0-306-47050-9.
- Hu, Chenming (2010). Modern semiconductor devices for integrated circuits. Boston: Prentice Hall Pearson Education. p. 351. ISBN 978-0-13-608525-6.
- Liu, Weidong; Hu, Chenming (2011). BSIM4 and MOSFET Modeling for IC Simulation. World Scientific. ISBN 978-981-256-863-2.
- Chauhan, Yogesh Singh; Pahwa, Girish; Dasgupta, Avirup; Lu, Darsen; Venugopalan, Sriramkumar; Khandelwal, Sourabh; Duarte, Juan Pablo; Paydavosi, Navid; Niknejad, Ali (2024), "BSIM-CMG model parameter extraction", Finfet/gaa Modeling for IC Simulation and Design, Elsevier, pp. 251–262, doi:10.1016/b978-0-323-95729-8.00011-8, ISBN 978-0-323-95729-8, retrieved 2025-09-16
- Hu, Chenming; Khandelwal, Sourabh, eds. (2019). Industry standard FDSOI compact model BSIM-IMG for IC design. Woodhead publishing series in electronic and optical materials. Duxford: WP, Woodhead Publishing. ISBN 978-0-08-102402-7.
Journals
- Chenming Hu; Bokor, J.; Tsu-Jae King; Anderson, E.; Kuo, C.; Asano, K.; Takeuchi, H.; Kedzierski, J.; Wen-Chin Lee; Hisamoto, D. (2000). "FinFET-a self-aligned double-gate MOSFET scalable to 20 nm". IEEE Transactions on Electron Devices. 47 (12): 2320–2325. Bibcode:2000ITED...47.2320H. doi:10.1109/16.887014. ISSN 0018-9383.
- Chenming Hu; Simon C. Tam; Fu-Chieh Hsu; Ping-Keung Ko; Tung-Yi Chan; Terrill, K.W. (1985). "Hot-Electron-Induced MOSFET Degradation - Model, Monitor, and Improvement". IEEE Journal of Solid-State Circuits. 20 (1): 295–305. Bibcode:1985IJSSC..20..295H. doi:10.1109/jssc.1985.1052306. ISSN 0018-9200.
- Desai, Sujay B.; Madhvapathy, Surabhi R.; Sachid, Angada B.; Llinas, Juan Pablo; Wang, Qingxiao; Ahn, Geun Ho; Pitner, Gregory; Kim, Moon J.; Bokor, Jeffrey; Hu, Chenming; Wong, H.-S. Philip; Javey, Ali (2016-10-07). "MoS2transistors with 1-nanometer gate lengths". Science. 354 (6308): 99–102. Bibcode:2016Sci...354...99D. doi:10.1126/science.aah4698. ISSN 0036-8075. OSTI 1347831. PMID 27846499.
- Hung, K.K.; Ko, P.K.; Hu, C.; Cheng, Y.C. (March 1990). "A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors". IEEE Transactions on Electron Devices. 37 (3): 654–665. Bibcode:1990ITED...37..654H. doi:10.1109/16.47770. ISSN 0018-9383.
- Yu, Bin; Chang, Leland; Ahmed, S.; Wang, Haihong; Bell, S.; Yang, Chih-Yuh; Tabery, C.; Ho, Chau; Xiang, Qi; King, Tsu-Jae; Bokor, J.; Hu, Chenming; Lin, Ming-Ren; Kyser, D. (2002). "FinFET scaling to 10 nm gate length". Digest. International Electron Devices Meeting. pp. 251–254. doi:10.1109/IEDM.2002.1175825. ISBN 0-7803-7462-2.
- Xuejue Huang; Wen-Chin Lee; Charles Kuo; Hisamoto, D.; Leland Chang; Kedzierski, J.; Anderson, E.; Takeuchi, H.; Yang-Kyu Choi; Asano, K.; Subramanian, V.; Tsu-Jae King; Bokor, J.; Chenming Hu (1999). "Sub 50-nm FinFET: PMOS". International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318). IEEE. pp. 67–70. doi:10.1109/iedm.1999.823848. ISBN 0-7803-5410-9.
- Cheema, Suraj S.; Kwon, Daewoong; Shanker, Nirmaan; dos Reis, Roberto; Hsu, Shang-Lin; Xiao, Jun; Zhang, Haigang; Wagner, Ryan; Datar, Adhiraj; McCarter, Margaret R.; Serrao, Claudy R.; Yadav, Ajay K.; Karbasian, Golnaz; Hsu, Cheng-Hsiang; Tan, Ava J. (2020-04-22). "Enhanced ferroelectricity in ultrathin films grown directly on silicon". Nature. 580 (7804): 478–482. Bibcode:2020Natur.580..478C. doi:10.1038/s41586-020-2208-x. ISSN 0028-0836. OSTI 1633850. PMID 32322080. (Erratum: doi:10.1038/s41586-020-2297-6, PMID 32433606 )
- Cao, Y.; Sato, T.; Orshansky, M.; Sylvester, D.; Hu, C. (2000). "New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation". Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044). IEEE. pp. 201–204. doi:10.1109/cicc.2000.852648. ISBN 0-7803-5809-0.
- Schuegraf, K.F.; Chenming Hu (1994). "Hole injection SiO/sub 2/ breakdown model for very low voltage lifetime extrapolation". IEEE Transactions on Electron Devices. 41 (5): 761–767. doi:10.1109/16.285029. ISSN 0018-9383.
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References
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