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Nader Bagherzadeh

American academic From Wikipedia, the free encyclopedia

Nader Bagherzadeh
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Nader Bagherzadeh (Persian: نادر باقرزاده) is a professor of computer engineering in the Department of Electrical Engineering and Computer Science at the University of California, Irvine, where he served as a chair from 1998 to 2003. Bagherzadeh has been involved in research and development in the areas of: Computer Architecture, Reconfigurable Computing, VLSI Chip Design, Network-on-Chip, 3D chips, Sensor Networks, Computer Graphics, Memory and Embedded Systems. Bagherzadeh was named Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2014[1] for contributions to the design and analysis of coarse-grained reconfigurable processor architectures. Bagherzadeh has published more than 400 articles in peer-reviewed journals and conferences. He was with AT&T Bell Labs from 1980 to 1984.

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Education

Notable works

  • MorphoSys: an integrated reconfigurable system for data-parallel and computation-intensive applications [2]
  • Design and implementation of the MorphoSys reconfigurable computing processor [3]
  • Power-aware scheduling under timing constraints for mission-critical embedded systems [4]
  • Optimal Ring Embedding in Hypercubes with Faulty Links
  • A scalable register file architecture for dynamically scheduled processors[5]
  • A framework for reconfigurable computing: task scheduling and context management [6]
  • Performance study of a multithreaded superscalar microprocessor [7]
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Awards

  • 2014, Khwarizmi International Award (27th Session)[8]
  • 2002, Best paper award in IEEE Transactions on VLSI Design (TVLSI)
  • 2002, Best paper award in the proceedings of Asia and South Pacific Design Automation Conference (ASPDAC)

References

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