RCA 501

The RCA 501 was a transistor computer manufactured by RCA beginning in 1958.

USAF RCA 501

History

RCA's pioneering work in transistors in other products provided its engineers with the basis needed to design effective use of transistors in early solid-state electronic computer systems as well. After three years of development, by 1959 RCA introduced^[1] the all-transistor RCA 501, a medium- to large-scale computer which – according to the sales brochures – was "the world's most advanced electronic data processing system".^[2] It was designed by industrial designer John Vassos, who employed a modular design strategy, framing the computer and its components as a system and not as individual units. He also used color coding to assist the operator to run the machine in an "orderly and fully controlled manner" according to the advertisement.^[3]

The United States Air Force purchased a 501 system in 1959 for $121,698. Other customers included the US Navy and Army, State Farm Life Insurance, and General Tire and Rubber Company.^[2]

A compatible version of the RCA 501 was sold by English Electric as their model KDP10/KDF8.

Features

The RCA 501 utilizes advanced manufacturing techniques such as pluggable card units or printed circuit boards. It also includes a centralized operating console, from which the operator can control all aspects of the computer from one location, including starting and stopping of programs.^[2] It also uses high-speed magnetic-core memory, expandable from 16k to 260k characters. An optional drum memory unit can provide up to 1.5 million characters of storage, and up to 63 magnetic tape units could be installed.^[1] The tape drives utilize variable-length records, whereby the "data on [the] tape [is] in proportion to the length of the data in each entry."^[4]

It weighs about 5,000 pounds (2.5 short tons; 2.3 t).^[5]

Architecture

The 501 uses a unique "RCA 501 character set" with seven bits - six data bits plus parity. Decimal numeric data is stored as four bits using excess-3 code.^{[6]: pp.5–6 [citation needed]} Core memory, called High-Speed Memory, or HSM, is character-addressable, but organized as 28-bit words, called tetrads. Reference to any character in a word fetches the entire word from memory.^[6]: p.13 Staticizing, what is now called instruction fetch and decode takes 30 microseconds; address modification, if any, takes 90 microseconds for the A or B register, or 180 microseconds for both. Most instructions automatically store the contents of the A register upon completion, which takes 15 microseconds. Due to the use of mostly variable-length operands, instructions then take additional time depending on operand length. Most arithmetic and logical instructions are storage to storage, and operate on variable-length operands.

Registers

The 501 has a number of registers. All registers hold three characters unless noted. Some of the most significant are:

• P register - the program counter or instruction pointer points to the next instruction while an instruction is being executed,
• A register and B register - hold the instruction operand addresses
• T register - "holds the third address when required by an instruction (e.g. [memory] address for the quotient in a Decimal Divide instruction). In some instructions it is used as an internal counter."
• Previous Result Indicators (PRIs) - what would now be called the Status or Condition code register. A three bit register holding information about the result of a previous arithmetic instruction: positive, negative, or zero.

Instructions

Instructions are eight characters (two tetrads).^[7] Instructions consist of a one-character operation code, three-character "A" and "B" addresses, and a one-character "N" field for address modification.^[8] The "N" field is interpreted as two octal digits. The first digit specifies modification for the "A" address and the second for the "B" address. Modification is as follows:

Digit	Function
0	No modification
1	Index by memory locations 111–113
2	Index by memory locations 221–223
3	Index by memory locations 131–133
4	Index by contents of P Register (program counter)
5	Index by memory locations 151–153
6	Index by contents of T Register
7	Index by memory locations 171–173

^{[6]: pp.13–14}

The 501 has 47 instructions which can be classified in twelve groups:

• Register manipulation instructions - 2 instructions (load/store)
• Tape input - 4 instructions
• Tape and console (monitor printer) output - 3 instructions
• Tape manipulation - 3 instructions
• Memory clear - 2 instructions
• Memory to memory transfer - 5 instructions
• Data manipulation - 6 instructions
• Decimal arithmetic - 4 instructions
• Binary arithmetic - 5 instructions
• Logical instructions - 2 instructions
• Sequence determination (branch) - 6 instructions
• Line printer operations - 2 instructions
• Instructions pertaining to simultantaniety - 3 instructions

See also

• List of transistorized computers
• History of computing hardware