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Radeon RX Vega series
Series of GPUs by AMD From Wikipedia, the free encyclopedia
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The Radeon RX Vega series is a series of graphics processors developed by AMD. These GPUs use the Graphics Core Next (GCN) 5th generation architecture, codenamed Vega, and are manufactured on 14 nm FinFET technology, developed by Samsung Electronics and licensed to GlobalFoundries.[5] The series consists of desktop graphics cards and APUs aimed at desktops, mobile devices, and embedded applications.
The lineup was released on 14 August 2017. It included the RX Vega 56 and the RX Vega 64, priced at $399 and $499 respectively.[6] These were followed by two mobile APUs, the Ryzen 2500U and Ryzen 2700U, in October 2017.[7] February 2018 saw the release of two desktop APUs, the Ryzen 3 2200G and the Ryzen 5 2400G, and the Ryzen Embedded V1000 line of APUs.[8][9] In September 2018 AMD announced several Vega APUs in their Athlon line of products.[10] Later in January 2019, the Radeon VII was announced based on the 7nm FinFET node manufactured by TSMC.[11][12]
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History
The Vega microarchitecture was AMD's high-end graphics cards line,[13] and is the successor to the R9 300 series enthusiast Fury products. Partial specifications of the architecture and Vega 10 GPU were announced with the Radeon Instinct MI25 in December 2016.[14] AMD later released the details of the Vega architecture.
Announcement
Vega was originally announced at AMD's CES 2017 presentation on 5 January 2017,[15] alongside the Zen line of CPUs.[16]
New features
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Vega targets increased instructions per clock, higher clock speeds, and support for HBM2.[17][18][19]
AMD's Vega has new memory hierarchy with high-bandwidth cache and its controller.[citation needed]
Support for HBM2 featuring double the bandwidth-per-pin over previous generation HBM. HBM2 allows for higher capacities with less than half the footprint of GDDR5 memory. Vega architecture is optimized for streaming very large datasets and can work with a variety of memory types with up to 512TB of virtual address space.[citation needed]
Primitive shader for improved geometry processing. Replaces vertex and geometry shaders in geometry processing pipelines with a more programmable single stage. The primitive shader stage is more efficient, introduces intelligent load balancing technologies and higher throughput.[20]
NCU: The Vega GPU introduces the Next-Gen Compute Unit. Versatile architecture featuring flexible compute units that can natively process 8-bit, 16-bit, 32-bit or 64-bit operations in each clock cycle. And run at higher frequencies. Vega brings support for Rapid Packed Math, processing two half-precision (16-bit) in the same time as a single 32-bit floating-point operation. Up to 128 32-bit, 256 16-bit or 512 8-bit ops per clock are possible with the Vega architecture.[20]
Draw Stream Binning Rasterizer designed for higher performance and power efficiency. It allows for "fetch once, shade once" of pixels through the use of a smart on-chip bin cache and early culling of pixels invisible in a final scene.[citation needed]
Vega bumps Direct3D feature level support from 12_0 to 12_1.[citation needed]
Vega's rasteriser brings hardware-acceleration support for Rasterizer Ordered Views and Conservative Rasterisation Tier 3.[21]
Products
RX Vega branded discrete graphics
- Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- GlobalFoundries' 14 nm 14LPP FinFET process is second-sourced from Samsung Electronics.
Radeon VII branded discrete graphics
- Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Workstation GPUs
- Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Mobile workstation GPUs
- Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Desktop APUs
Raven Ridge (2018)
Common features of Zen based Raven Ridge desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-2666 (DDR4-2933 Ryzen) in dual-channel mode.
- L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: GlobalFoundries 14LP.
- Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Picasso (2019)
Common features of Zen+ based desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-2933 in dual-channel mode, while Athlon Pro 300GE and Athlon Silver Pro 3125GE support only DDR4-2666.
- L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: GlobalFoundries 12LP.
- Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Renoir (2020)
Common features of Ryzen 4000 desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-3200 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
- Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Cezanne (2021)
Common features of Ryzen 5000 desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-3200 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
- Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Mobile APUs
Raven Ridge (2017)
- Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Picasso (2019)
Common features of Ryzen 3000 notebook APUs:
- Socket: FP5.
- All the CPUs support DDR4-2400 in dual-channel mode.
- L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: GlobalFoundries 12LP (14LP+).
- Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Dalí (2020)
- Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Renoir (2020)
Common features of Ryzen 4000 notebook APUs:
- Socket: FP6.
- All the CPUs support DDR4-3200 or LPDDR4-4266 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
- Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Only found on the Microsoft Surface Laptop 4.
Lucienne (2021)
Common features of Ryzen 5000 notebook APUs:
- Socket: FP6.
- All the CPUs support DDR4-3200 or LPDDR4-4266 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
- Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Cezanne (2021)
Common features of Ryzen 5000 notebook APUs:
- Socket: FP6.
- All the CPUs support DDR4-3200 or LPDDR4-4266 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
- Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Embedded APUs
- Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
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References
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