PMOS and NMOS
More information Date, Channel length ...
MOSFET (PMOS and NMOS) demonstrations
Date |
Channel length |
Oxide thickness[1] |
MOSFET logic |
Researcher(s) |
Organization |
Ref |
June 1960 |
20,000 nm |
100 nm |
PMOS |
Mohamed M. Atalla, Dawon Kahng |
Bell Telephone Laboratories |
[2][3] |
NMOS |
10,000 nm |
100 nm |
PMOS |
Mohamed M. Atalla, Dawon Kahng |
Bell Telephone Laboratories |
[4] |
NMOS |
May 1965 |
8,000 nm |
150 nm |
NMOS |
Chih-Tang Sah, Otto Leistiko, A.S. Grove |
Fairchild Semiconductor |
[5] |
5,000 nm |
170 nm |
PMOS |
December 1972 |
1,000 nm |
? |
PMOS |
Robert H. Dennard, Fritz H. Gaensslen, Hwa-Nien Yu |
IBM T.J. Watson Research Center |
[6][7][8] |
1973 |
7,500 nm |
? |
NMOS |
Sohichi Suzuki |
NEC |
[9][10] |
6,000 nm |
? |
PMOS |
? |
Toshiba |
[11][12] |
October 1974 |
1,000 nm |
35 nm |
NMOS |
Robert H. Dennard, Fritz H. Gaensslen, Hwa-Nien Yu |
IBM T.J. Watson Research Center |
[13] |
500 nm |
September 1975 |
1,500 nm |
20 nm |
NMOS |
Ryoichi Hori, Hiroo Masuda, Osamu Minato |
Hitachi |
[7][14] |
March 1976 |
3,000 nm |
? |
NMOS |
? |
Intel |
[15] |
April 1979 |
1,000 nm |
25 nm |
NMOS |
William R. Hunter, L. M. Ephrath, Alice Cramer |
IBM T.J. Watson Research Center |
[16] |
December 1984 |
100 nm |
5 nm |
NMOS |
Toshio Kobayashi, Seiji Horiguchi, K. Kiuchi |
Nippon Telegraph and Telephone |
[17] |
December 1985 |
150 nm |
2.5 nm |
NMOS |
Toshio Kobayashi, Seiji Horiguchi, M. Miyake, M. Oda |
Nippon Telegraph and Telephone |
[18] |
75 nm |
? |
NMOS |
Stephen Y. Chou, Henry I. Smith, Dimitri A. Antoniadis |
MIT |
[19] |
January 1986 |
60 nm |
? |
NMOS |
Stephen Y. Chou, Henry I. Smith, Dimitri A. Antoniadis |
MIT |
[20] |
June 1987 |
200 nm |
3.5 nm |
PMOS |
Toshio Kobayashi, M. Miyake, K. Deguchi |
Nippon Telegraph and Telephone |
[21] |
December 1993 |
40 nm |
? |
NMOS |
Mizuki Ono, Masanobu Saito, Takashi Yoshitomi |
Toshiba |
[22] |
September 1996 |
16 nm |
? |
PMOS |
Hisao Kawaura, Toshitsugu Sakamoto, Toshio Baba |
NEC |
[23] |
June 1998 |
50 nm |
1.3 nm |
NMOS |
Khaled Z. Ahmed, Effiong E. Ibok, Miryeong Song |
Advanced Micro Devices (AMD) |
[24][25] |
December 2002 |
6 nm |
? |
PMOS |
Bruce Doris, Omer Dokumaci, Meikei Ieong |
IBM |
[26][27][28] |
December 2003 |
3 nm |
? |
PMOS |
Hitoshi Wakabayashi, Shigeharu Yamagami |
NEC |
[29][27] |
? |
NMOS |
Close
CMOS (single-gate)
More information Date, Channel length ...
Complementary MOSFET (CMOS) demonstrations (single-gate)
Date |
Channel length |
Oxide thickness[1] |
Researcher(s) |
Organization |
Ref |
February 1963 |
? |
? |
Chih-Tang Sah, Frank Wanlass |
Fairchild Semiconductor |
[30][31] |
1968 |
20,000 nm |
100 nm |
? |
RCA Laboratories |
[32] |
1970 |
10,000 nm |
100 nm |
? |
RCA Laboratories |
[32] |
December 1976 |
2,000 nm |
? |
A. Aitken, R.G. Poulsen, A.T.P. MacArthur, J.J. White |
Mitel Semiconductor |
[33] |
February 1978 |
3,000 nm |
? |
Toshiaki Masuhara, Osamu Minato, Toshio Sasaki, Yoshio Sakai |
Hitachi Central Research Laboratory |
[34][35][36] |
February 1983 |
1,200 nm |
25 nm |
R.J.C. Chwang, M. Choi, D. Creek, S. Stern, P.H. Pelley |
Intel |
[37][38] |
900 nm |
15 nm |
Tsuneo Mano, J. Yamada, Junichi Inoue, S. Nakajima |
Nippon Telegraph and Telephone (NTT) |
[37][39] |
December 1983 |
1,000 nm |
22.5 nm |
G.J. Hu, Yuan Taur, Robert H. Dennard, Chung-Yu Ting |
IBM T.J. Watson Research Center |
[40] |
February 1987 |
800 nm |
17 nm |
T. Sumi, Tsuneo Taniguchi, Mikio Kishimoto, Hiroshige Hirano |
Matsushita |
[37][41] |
700 nm |
12 nm |
Tsuneo Mano, J. Yamada, Junichi Inoue, S. Nakajima |
Nippon Telegraph and Telephone (NTT) |
[37][42] |
September 1987 |
500 nm |
12.5 nm |
Hussein I. Hanafi, Robert H. Dennard, Yuan Taur, Nadim F. Haddad |
IBM T.J. Watson Research Center |
[43] |
December 1987 |
250 nm |
? |
Naoki Kasai, Nobuhiro Endo, Hiroshi Kitajima |
NEC |
[44] |
February 1988 |
400 nm |
10 nm |
M. Inoue, H. Kotani, T. Yamada, Hiroyuki Yamauchi |
Matsushita |
[37][45] |
December 1990 |
100 nm |
? |
Ghavam G. Shahidi, Bijan Davari, Yuan Taur, James D. Warnock |
IBM T.J. Watson Research Center |
[46] |
1993 |
350 nm |
? |
? |
Sony |
[47] |
1996 |
150 nm |
? |
? |
Mitsubishi Electric |
1998 |
180 nm |
? |
? |
TSMC |
[48] |
December 2003 |
5 nm |
? |
Hitoshi Wakabayashi, Shigeharu Yamagami, Nobuyuki Ikezawa |
NEC |
[29][49] |
Close
Multi-gate MOSFET (MuGFET)
More information Date, Channel length ...
Multi-gate MOSFET (MuGFET) demonstrations
Date |
Channel length |
MuGFET type |
Researcher(s) |
Organization |
Ref |
August 1984 |
? |
DGMOS |
Toshihiro Sekigawa, Yutaka Hayashi |
Electrotechnical Laboratory (ETL) |
[50] |
1987 |
2,000 nm |
DGMOS |
Toshihiro Sekigawa |
Electrotechnical Laboratory (ETL) |
[51] |
December 1988 |
250 nm |
DGMOS |
Bijan Davari, Wen-Hsing Chang, Matthew R. Wordeman, C.S. Oh |
IBM T.J. Watson Research Center |
[52][53] |
180 nm |
? |
GAAFET |
Fujio Masuoka, Hiroshi Takato, Kazumasa Sunouchi, N. Okabe |
Toshiba |
[54][55][56] |
December 1989 |
200 nm |
FinFET |
Digh Hisamoto, Toru Kaga, Yoshifumi Kawamoto, Eiji Takeda |
Hitachi Central Research Laboratory |
[57][58][59] |
December 1998 |
17 nm |
FinFET |
Digh Hisamoto, Chenming Hu, Tsu-Jae King Liu, Jeffrey Bokor |
University of California (Berkeley) |
[60][61] |
2001 |
15 nm |
FinFET |
Chenming Hu, Yang-Kyu Choi, Nick Lindert, Tsu-Jae King Liu |
University of California (Berkeley) |
[60][62] |
December 2002 |
10 nm |
FinFET |
Shibly Ahmed, Scott Bell, Cyrus Tabery, Jeffrey Bokor |
University of California (Berkeley) |
[60][63] |
June 2006 |
3 nm |
GAAFET |
Hyunjin Lee, Yang-kyu Choi, Lee-Eun Yu, Seong-Wan Ryu |
KAIST |
[64][65] |
Close
Other types of MOSFET
More information Date, Channellength(nm) ...
MOSFET demonstrations (other types)
Date |
Channel length (nm) |
Oxide thickness (nm)[1] |
MOSFET type |
Researcher(s) |
Organization |
Ref |
October 1962 |
? |
? |
TFT |
Paul K. Weimer |
RCA Laboratories |
[66][67] |
1965 |
? |
? |
GaAs |
H. Becke, R. Hall, J. White |
RCA Laboratories |
[68] |
October 1966 |
100,000 |
100 |
TFT |
T.P. Brody, H.E. Kunig |
Westinghouse Electric |
[69][70] |
August 1967 |
? |
? |
FGMOS |
Dawon Kahng, Simon Min Sze |
Bell Telephone Laboratories |
[71] |
October 1967 |
? |
? |
MNOS |
H.A. Richard Wegener, A.J. Lincoln, H.C. Pao |
Sperry Corporation |
[72] |
July 1968 |
? |
? |
BiMOS |
Hung-Chang Lin, Ramachandra R. Iyer |
Westinghouse Electric |
[73][74] |
October 1968 |
? |
? |
BiCMOS |
Hung-Chang Lin, Ramachandra R. Iyer, C.T. Ho |
Westinghouse Electric |
[75][74] |
1969 |
? |
? |
VMOS |
? |
Hitachi |
[76][77] |
September 1969 |
? |
? |
DMOS |
Y. Tarui, Y. Hayashi, Toshihiro Sekigawa |
Electrotechnical Laboratory (ETL) |
[78][79] |
October 1970 |
? |
? |
ISFET |
Piet Bergveld |
University of Twente |
[80][81] |
October 1970 |
1000 |
? |
DMOS |
Y. Tarui, Y. Hayashi, Toshihiro Sekigawa |
Electrotechnical Laboratory (ETL) |
[82] |
1977 |
? |
? |
VDMOS |
John Louis Moll |
HP Labs |
[76] |
? |
? |
LDMOS |
? |
Hitachi |
[83] |
July 1979 |
? |
? |
IGBT |
Bantval Jayant Baliga, Margaret Lazeri |
General Electric |
[84] |
December 1984 |
2000 |
? |
BiCMOS |
H. Higuchi, Goro Kitsukawa, Takahide Ikeda, Y. Nishio |
Hitachi |
[85] |
May 1985 |
300 |
? |
? |
K. Deguchi, Kazuhiko Komatsu, M. Miyake, H. Namatsu |
Nippon Telegraph and Telephone |
[86] |
February 1985 |
1000 |
? |
BiCMOS |
H. Momose, Hideki Shibata, S. Saitoh, Jun-ichi Miyamoto |
Toshiba |
[87] |
November 1986 |
90 |
8.3 |
? |
Han-Sheng Lee, L.C. Puzio |
General Motors |
[88] |
December 1986 |
60 |
? |
? |
Ghavam G. Shahidi, Dimitri A. Antoniadis, Henry I. Smith |
MIT |
[89][20] |
May 1987 |
? |
10 |
? |
Bijan Davari, Chung-Yu Ting, Kie Y. Ahn, S. Basavaiah |
IBM T.J. Watson Research Center |
[90] |
December 1987 |
800 |
? |
BiCMOS |
Robert H. Havemann, R. E. Eklund, Hiep V. Tran |
Texas Instruments |
[91] |
June 1997 |
30 |
? |
EJ-MOSFET |
Hisao Kawaura, Toshitsugu Sakamoto, Toshio Baba |
NEC |
[92] |
1998 |
32 |
? |
? |
? |
NEC |
[27] |
1999 |
8 |
? |
? |
? |
April 2000 |
8 |
? |
EJ-MOSFET |
Hisao Kawaura, Toshitsugu Sakamoto, Toshio Baba |
NEC |
[93] |
Close
Products featuring 20 μm manufacturing process
Products featuring 10 μm manufacturing process
Products featuring 8 μm manufacturing process
Products featuring 6 μm manufacturing process
Products featuring 3 μm manufacturing process
Products featuring 1.5 μm manufacturing process
Products featuring 1 μm manufacturing process
Products featuring 800 nm manufacturing process
Products featuring 600 nm manufacturing process
Products featuring 350 nm manufacturing process
Products featuring 250 nm manufacturing process
Processors using 180 nm manufacturing technology
Processors using 130 nm manufacturing technology
Chips using 90 nm manufacturing technology
- Sony–Toshiba Emotion Engine+Graphics Synthesizer (PlayStation 2) – 2003[101]
- IBM PowerPC G5 970FX – 2004
- Elpida Memory's 90 nm DDR2 SDRAM process – 2005
- IBM PowerPC G5 970MP – 2005
- IBM PowerPC G5 970GX – 2005
- IBM Waternoose Xbox 360 Processor – 2005
- IBM–Sony–Toshiba Cell processor – 2005
- Intel Pentium 4 Prescott – 2004-02
- Intel Celeron D Prescott-256 – 2004-05
- Intel Pentium M Dothan – 2004-05
- Intel Celeron M Dothan-1024 – 2004-08
- Intel Xeon Nocona, Irwindale, Cranford, Potomac, Paxville – 2004-06
- Intel Pentium D Smithfield – 2005-05
- AMD Athlon 64 Winchester, Venice, San Diego, Orleans – 2004-10
- AMD Athlon 64 X2 Manchester, Toledo, Windsor – 2005-05
- AMD Sempron Palermo and Manila – 2004-08
- AMD Turion 64 Lancaster and Richmond – 2005-03
- AMD Turion 64 X2 Taylor and Trinidad – 2006-05
- AMD Opteron Venus, Troy, and Athens – 2005-08
- AMD Dual-core Opteron Denmark, Italy, Egypt, Santa Ana, and Santa Rosa
- VIA C7 – 2005-05
- Loongson (Godson) 2Е STLS2E02 – 2007-04
- Loongson (Godson) 2F STLS2F02 – 2008-07
- MCST-4R – 2010-12
- Elbrus-2C+ – 2011-11
Processors using 65 nm manufacturing technology
Processors using 45 nm technology
Chips using 32 nm technology
- Toshiba produced commercial 32 Gb NAND flash memory chips with the 32 nm process in 2009.[107]
- Intel Core i3 and i5 processors, released in January 2010[108]
- Intel 6-core processor, codenamed Gulftown[109]
- Intel i7-970, was released in late July 2010, priced at approximately US$900
- AMD FX Series processors, codenamed Zambezi and based on AMD's Bulldozer architecture, were released in October 2011. The technology used a 32 nm SOI process, two CPU cores per module, and up to four modules, ranging from a quad-core design costing approximately US$130 to a $280 eight-core design.
- Ambarella Inc. announced the availability of the A7L system-on-a-chip circuit for digital still cameras, providing 1080p60 high-definition video capabilities in September 2011[110]
Chips using 24–28 nm technology
- SK Hynix announced that it could produce a 26 nm flash chip with 64 Gb capacity; Intel Corp. and Micron Technology had by then already developed the technology themselves. Announced in 2010.[111]
- Toshiba announced that it was shipping 24 nm flash memory NAND devices on August 31, 2010.[112]
- In 2016 MCST's 28 nm processor Elbrus-8S went for serial production.[113][114]
Chips using 22 nm technology
- Intel Core i7 and Intel Core i5 processors based on Intel's Ivy Bridge 22 nm technology for series 7 chip-sets went on sale worldwide on April 23, 2012.[115]
Chips using 20 nm technology
Chips using 16 nm technology
Chips using 14 nm technology
Chips using 10 nm technology
Chips using 7 nm technology
- TSMC began risk production of 256 Mbit SRAM memory chips using a 7 nm process in April 2017.[125]
- Samsung and TSMC began mass production of 7 nm devices in 2018.[126]
- Apple A12 and Huawei Kirin 980 mobile processors, both released in 2018, use 7 nm chips manufactured by TSMC.[127]
- AMD began using TSMC 7 nm starting with the Vega 20 GPU in November 2018,[128] with Zen 2-based CPUs and APUs from July 2019,[129] and for both PlayStation 5 [130] and Xbox Series X/S [131] consoles' APUs, released both in November 2020.
Chips using 5 nm technology
- Samsung began production of 5 nm chips (5LPE) in late 2018.[132]
- TSMC began production of 5 nm chips (CLN5FF) in April 2019.[133]
Chips using 3 nm technology
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