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Sandy Bridge

Intel processor microarchitecture / From Wikipedia, the free encyclopedia

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Sandy Bridge is the codename for Intel's 32 nm microarchitecture used in the second generation of the Intel Core processors (Core i7, i5, i3). The Sandy Bridge microarchitecture is the successor to Nehalem and Westmere microarchitecture. Intel demonstrated a Sandy Bridge processor in 2009, and released first products based on the architecture in January 2011 under the Core brand.[2][3]

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Sandy Bridge
General information
LaunchedJanuary 9, 2011; 12 years ago (January 9, 2011)
DiscontinuedSeptember 27, 2013 [1]
Product code80619 (extreme desktop)
80620 (server LGA1356)
80621 (server LGA2011)
80623 (desktop)
80627 (mobile)
Performance
Max. CPU clock rate1.60 GHz to 3.60 GHz
DMI speeds5.00 GT/s
Cache
L1 cache64 KB per core
L2 cache256 KB per core
L3 cache1 MB to 8 MB shared
10 MB to 15 MB (Extreme)
3 MB to 20 MB (Xeon)
Architecture and classification
MicroarchitectureSandy Bridge
Instruction setx86-64
Instructionsx86, x86-64
Extensions
Physical specifications
Transistors
Cores
  • 1–4 (4-6 Extreme, 2-8 Xeon)
GPU(s)HD Graphics
650 MHz to 1100 MHz
HD Graphics 2000
650 MHz to 1250 MHz
HD Graphics 3000
650 MHz to 1350 MHz
HD Graphics P3000
850 MHz to 1350 MHz
Socket(s)
Products, models, variants
Model(s)
History
Predecessor(s)Nehalem (Tock)
Westmere (Tick)
Successor(s)Ivy Bridge (Tick)
Haswell (Tock)
Support status
Unsupported
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Intel_CPU_Core_i7_2600K_Sandy_Bridge_perspective.jpg
Bottom view of a Sandy Bridge i7-2600k
Intel_i5-2500.jpg
Top of a Sandy Bridge i5

Sandy Bridge is manufactured in the 32 nm process and has a soldered contact with the die and IHS (Integrated Heat Spreader), while Intel's subsequent generation Ivy Bridge uses a 22 nm die shrink and a TIM (Thermal Interface Material) between the die and the IHS.