Opcode prefix

In computing, an opcode prefix is an numeric value that alters the function of a following opcode.^[1] On some instruction set architectures multiple opcode prefixes are allowed sequentially, with all combining to alter the subsequent opcode. The opcode prefix is a portion of a larger machine language instruction that specifies the operation to be performed.

In addition to the opcode, some instructions specify the operands the operation will act upon. Opcode prefixes may alter the number or size of the operands.

RISC processors do not use opcode prefixes.

Types of prefixes

Opcode prefixes generally fall into two categories:

1. Opcode prefixes that alter subsequent opcode functions.
2. Opcode prefixes that enable an alternate set of opcodes. This is analogous to the shift key on a keyboard. In this way, instruction sets can be extended by adding a subset of new instructions by reusing existing reserved opcodes.

Example opcode prefixes

The following is not intended to be an exhaustive list of opcode prefixes but instead is intended to show how opcode prefixes have been used in various CPU instruction set architectures.

Microcontroller

The National Semiconductor COP400 is an 4-bit microcontroller family introduced in 1977. It has 255 single-byte opcodes. It uses a 33H opcode prefix to enable an alternate set of 187 opcodes.^[2]

The National Semiconductor COP8 is an 8-bit microcontroller introduced in 1988. COP8 is an enhancement to National's earlier COP400. It uses an opcode prefix to alter its operands. Normally, absolute RAM addressing is only directly encoded for just four instructions: LD A,addr8, X A,addr8, IFEQ addr8,#imm8, and LD addr8,#imm8. A two-byte DIR opcode prefix may be added to any other instruction that normally uses the B index register to access memory to convert that instruction to absolute RAM addressing. The prefix is 0xBD followed by an 8-bit absolute address. This prefix is unusual in that it is two bytes instead of one.^[3]

8-bit microprocessor

The Zilog Z80 is an 8-bit microprocessor that was launched in 1976. It was designed to be backward software-compatible with the Intel 8080. It uses opcode prefixes to both alter its operands and to extend its instruction set.

In order to access operands in its new IX and IY registers, 0xDD or 0xFE is prefixed to the old 8080 instructions, allowing those instructions to substitute IX or IY, respectively, for HL. In cases where (HL) is used, (iX+disp) and (IY+disp) addressing modes are substituted.

0xCB and 0xED enable new instructions not found on the 8080. Prefixes can be combined: The 0xDD or 0xFE IX/IY prefixes can prefix any 0xCB prefixed instruction that uses HL.^[4]

16-bit microprocessor

The Intel 8086 and 8088 have three types of prefixes, all which can be combined^{[note 1]} to alter some subsequent instructions.^[5]

Segment override: Normally the data segment (DS) is used for most data accesses and the stack segment (SS) is used for any accesses involving BP or SP. One-byte segment override prefixes are provided to substitute ES, CS, SS, or DS.

Repeat: String instructions LODS, STOS, MOVS, CMPS, and SCAS normally execute just one iteration. If a REP prefix is added to any string instruction, it will repeat CX times. The CMPS and SCAS instructions might terminate early if their equal or not equal conditions are satisfied. These instructions can be combined with segment override prefix for the source string.

Lock: The LOCK prefix is used with a read-modify-write instructions such as INC, DEC, or XCHG to insure that another bus master cannot interfere with the read or write operation. LOCK can be combined with segment override prefix.

64-bit microprocessor

AMD64 or x86-64 is a 64-bit extension of the x86 instruction set. It was announced in 1999 and first available in the AMD Opteron family in 2003. It introduced a REX opcode prefix that provides additional space for encoding 64-bit addressing modes and the additional eight integer registers present in the x86-64 architecture.^[6]