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RISC-V instruction listings

List of RISC-V microprocessor instructions From Wikipedia, the free encyclopedia

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The RISC-V instruction set refers to the set of instructions that RISC-V compatible microprocessors support. The instructions are usually part of an executable program, often stored as a computer file and executed on the processor.

RISC-V Integer Instructions

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The table below contains a list of the RV Integer Instructions.[1] The integer instruction set is divided in the base I part of the ISA that comes in a 32 bit RV32 and 64 bit RV64 version and M, B and Zicond extensions. There is also an A extension for atomic instructions and F and D instructions for floating point operations.

More information Instruction, Name ...
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Remarks

  1. Assembler macro, for immediates needing less than 12 bit expands to addi rd zero imm
  2. Pseudo Instruction. Expands to single instruction.
  3. Assembler macro clobbering ra. Interacts with the loader symbol relocation. Expands to jal ra, imm or auipc ra, imm; jalr ra, ra imm combination
  4. Assembler macro, may clobber t1. Interacts with the loader symbol relocation. Expands to jal zero imm or auipc t1, imm; jalr zero t1, imm combination
  5. Pseudo instruction clobbering ra. Expands to jal zero, ra, 0
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