Repeat instruction

In computer instruction set architectures (ISA), a repeat instruction is a machine language instruction which repeatedly executes another instruction a fixed number of times, or until some condition is met.

Since it is an instruction that operates on other instructions like the execute instruction, it has been classified as a meta-instruction.^[1]

Computer models

The Univac 1103 (1953) includes a repeat instruction (op code mnemonic: RPjnw) which executes the following instruction a fixed number of times, possibly incrementing one or both of the address fields of that instruction.^[2] This compensates for the architecture's lack of index registers.^[3]

The GE-600/Honeywell 6000 series (1964) supports a single-instruction repeat (RPT), a double-instruction repeat (RPTD), and a linked-list repeat (RPL).^[4][5]

The x86 ISA, starting with the 8086, includes a series of special-purpose repeat instructions (REP(∅/E/Z/NE/NZ)) which are called "repeat string operation prefixes" and may only be applied to a small number of string instructions (INS, OUTS, MOVS, LODS, STOS, CMPS, SCAS). These instructions repeat an operation and decrement a counter until it is zero, or may also stop when a certain condition is met.^[6]

The Texas Instruments TMS320 digital signal processor (1983) includes an instruction for repeating a single-cycle instruction or two single-cycle instruction in parallel (RPT) and an instruction for repeating a block of instructions (RPTC). These use special block-repeat counter registers (BRC0, BRC1).^[7]

Semantics

The instruction or instruction pair to be executed follows the repeat instruction. Fields in the instruction determine the loop termination condition.^[5] In the case of the TMS320, a block of up to 64Kbytes can be repeated.^[7]